During underwater signal data transmission process, using Field Programmable Gate Array (FPGA) to calculate Cyclic Redundancy Check (CRC) code with traditional serial calculating method cannot meet the demand of fast computation; however, parallel checking method, which is much faster, has difficulty in practical engineering application because of programming complexity. In order to meet the demand of transmission speed, to eliminate programming difficulty and time waste, a method was proposed to automatically generate parallel CRC code for any length data frames by Matlab. It finished all the mathematical deductions based on matrix method and calculations with the help of Matlab and then generated parallel CRC calculating program which conforms to the Verilog HDL grammar rules. Finally, the CRC calculation program statements generated by Matlab were first simulated in Quartus II 9.0 and then demonstrated by data transmission experiments on a civil towed sonar system. The results prove the validity of the proposed method, its programming and generation can be finished in tens of seconds, and the CRC module can accurately figure out CRC code of every long data frame defined by transmission protocol within requested time.